Last session ended on a lamp that cannot flip a switch. Today we fix that, and then build every gate there is out of transistors.
Collect the send off. Somebody should have a truth table from their own life.
press the button. watch the arm.
Wrap a coil round some iron and let the magnet pull the switch.
remember
Current through the coil makes the iron a magnet, and the magnet pulls the arm down.
The arm carries a bar bridging two contacts on a completely separate circuit. The only thing crossing between the two is a piece of metal, not a wire.
So electricity now operates a switch, and one circuit can drive the next with no hand in between.
Press it a few times. The separation of the two loops is the invention, not the magnet.
So why is there not one of these inside your phone?
RELAY · 1835
a moving arm
~1 millisecond
Large, loud, and it wears out because something actually moves. A thousand operations a second at best.
VACUUM TUBE · 1904
a heated wire
~1 microsecond
A thousand times faster and nothing moves, but it is a light bulb, so it runs hot and burns out. ENIAC had 17,000 and lost several a week.
TRANSISTOR · 1947
a piece of crystal
~1 picosecond
Nothing moves, nothing is heated, nothing burns out. A million times faster again, and small enough to put billions on a fingernail.
Bardeen, Brattain and Shockley, Bell Labs, December 1947.
Each step is about a thousand times faster than the last. Nine orders of magnitude across the row.
click the picture
Three terminals. One decides whether the other two are joined.
Put a voltage on the gate and a channel forms in the crystal underneath, joining the other two terminals.
Remove it and the channel disappears. The gate carries no current itself. It only has to sit at a voltage.
remember
A switch controlled by a voltage instead of a finger or a magnet.
Nothing moves. The channel is a region of crystal that becomes conductive.
This one is NMOS. Conducts when the gate is high. There is a second flavour and it matters enormously.
one input, driving both
They come in two kinds, and they are exact opposites.
remember
NMOS conducts when its gate is high.
PMOS conducts when its gate is low. The small circle on the gate is how you spot one.
Feed both the same input and exactly one conducts. Always. Never both, never neither.
Both are cheap to make side by side on one piece of silicon, and that fact shapes everything after this slide.
Toggle it a few times. The always exactly one property is what the next slide is built on.
So every gate is built the same way: a network above, a network below.
remember
PMOS above, to pull the output up to the supply. NMOS below, to pull it down to ground.
Both connected at once is a direct path from supply to ground. That is a short, and the gate becomes a heater.
Neither connected leaves the output floating at no particular voltage, and the next gate reads noise.
So the two networks must be exact opposites, which falls out for free because NMOS and PMOS are opposites.
The C in CMOS is complementary and it means precisely this. Essentially every chip you own is built this way.
gate one of six · click the input box, or the button
symbol
truth table
2TRANSISTORS
remember
Input low: the PMOS conducts, the output joins the supply, and it reads high. Input high: the NMOS conducts and it joins ground.
Exactly one path is live at a time. Follow the orange.
This is NOT from Class 13, the switch across the lamp, rebuilt in crystal.
gate two of six · click either input box, or the buttons
symbol
truth table
4TRANSISTORS
remember
Two NMOS in series below, so the output is pulled down only when both inputs are high.
Two PMOS in parallel above, so it is pulled up when either input is low. Series and parallel, exactly as with the switches.
Point at the series stack. That is the in-a-row arrangement from the switch bench, in silicon.
gate three of six · the mirror image
symbol
truth table
4TRANSISTORS
remember
PMOS in series above, NMOS in parallel below. Swap the two networks and you get a different gate at the same price.
Pulled down when either input is high, so the output is low unless both inputs are low.
Ask them to predict the table from the NAND by symmetry before flipping anything.
Now build AND. It ought to be easier than NAND.
You want the output high when both inputs are high, so put the series stack on top and the parallel one below, and you are done.
You cannot. A network reaching down to ground can only ever produce a low, and one reaching up to the supply can only ever produce a high.
The network that senses the inputs is the pull down one, and pulling down means outputting a zero. The structure inverts by construction.
so every non inverting gate is built in two stages
Make the inverted version first, because that is what the silicon will give you.
Then put an inverter on the output to undo it.
Two extra transistors, every time, on every gate whose symbol has no bubble.
Let them try to design it for a minute before you say it cannot be done. The reason is worth arriving at.
gate four of six · a NAND with its answer undone
symbol
truth table
6TRANSISTORS
remember
Four transistors for the NAND, two more for the inverter that flips its answer back.
Watch the middle wire. It carries the opposite of what you asked for, all the way until the last pair.
Trace the middle wire with a finger for each input pair. That wire is the whole argument.
gate five of six · the same trick again
symbol
truth table
6TRANSISTORS
remember
Identical structure to AND, with a NOR in front instead of a NAND.
Both of the gates you would have called fundamental turn out to be two stage constructions.
Quick slide. The point is the symmetry, and that they have now seen the pattern twice.
gate six of six · four NANDs, sixteen transistors
symbol
truth table
16TRANSISTORS
remember
No single pull up and pull down pair produces XOR, so it has to be assembled from whole gates. Each box below holds the four transistors you built two slides ago.
A dedicated design gets it to twelve, and pass transistor tricks reach six by giving other things up. Even at its best it is the dearest gate on the list.
Flip inputs slowly and watch n1, the shared middle signal. That one wire is what makes the trick work.
Six gates, built. Now put the bill on one page.
gate
transistors
how you just built it
NOT
2
one PMOS above, one NMOS below
NAND
4
two NMOS in series, two PMOS in parallel
NOR
4
two NMOS in parallel, two PMOS in series
AND
6
a NAND, then an inverter to undo it
OR
6
a NOR, then an inverter to undo it
XOR
16
four NANDs, and twelve if you design it properly
The gates that feel primitive are the expensive ones. Every gate without a bubble costs two transistors more than the one with it.
This is why real chips are full of NAND and NOR and almost devoid of plain AND.
And notice XOR has now been expensive twice, in two different materials.
Class 13, with switches. It would not come out of series or parallel at all. It needed a better kind of switch and twice the wire.
Class 14, in silicon. No single network gives it, so it takes four whole gates.
remember
XOR asks are these two different, and difference cannot be answered by one path of switches. Something has to compare.
That is exactly what one column of an addition needs, which is why the adder in Class 19 costs what it does.
When a design turns out surprisingly expensive, look for an XOR hiding in it.
Two encounters with one fact. They will not have connected them, so say it.
And now we stop drawing transistors.
We stop asking how a channel forms in doped silicon, and start asking only what a box does to its inputs.
Everything below that line still exists and still matters. It is simply no longer our problem.
remember
That line is an abstraction boundary, and crossing one is the main move in this whole subject.
You will cross several more: gates to circuits, circuits to an ALU, an ALU to instructions, instructions to C.
Each works the same way. You get a box with a promise, and you stop looking inside.
The boundary leaks when the promise is not quite true, which is what every failure in Arc 1 turned out to be.
Students who never notice they crossed a line keep reaching back for the physics in Class 17.
You now have six kinds of gate, and you know what each one costs.
Class 13 showed there are exactly sixteen functions of two inputs. Three inputs give 256. Four give 65,536.
Next session: is a small box of parts enough to build any of them?
Stop here. Send off: build NAND and NOR from transistors in Logisim, then build AND from your own NAND and count the parts.