You finished a thirty two bit adder last session and it gives the right answer every time. That is not the same as it being good enough.
Do not define anything yet. The first job is to make them want a number they do not have.
Last session you built it. This session you find out what it costs you.
the hour in three questions
How long does one addition actually take? A real number, in picoseconds.
Is that slow? You will find you cannot answer that until you are told one more thing.
Can it be fixed without redesigning the adder? Two ways out, and both of them close.
Flag the middle question. That is the one that makes the hour worth sitting through.
answer out loud before the next slide
Here is your adder. Would you put it in a product?
why nobody can answer yet
You know it is correct. You know how many gates it has. Neither of those tells you whether it is fast enough.
You do not have a number for how long it takes, and you do not have anything to compare that number against.
The rest of the hour is those two missing things, in that order.
Take real answers. Someone will say yes, someone no. Neither can defend it, and that is the point.
Start at the bottom. Why does a single gate take any time at all?
remember
Nothing is deciding anything. A wire has capacitance, the gate drives it through resistance, and the voltage climbs a curve.
The next gate cannot read the answer until that climb passes its threshold. That wait is the whole delay.
About twenty picoseconds, set by the process the chip is made on. You do not get to negotiate it.
Kill the idea that gates think. It is a bucket filling. Everything later is just counting buckets.
Now one column. How long before its carry out is trustworthy?
remember
Trace the carry in. It cannot reach the output OR without passing an AND gate first.
Two gates deep, so two gate delays, so forty picoseconds. Every column, identically.
Make them trace the path with a finger. The number is worthless if they did not see where it came from.
commit to a number before you press run
Thirty two columns at two delays each. What is the total?
Collect guesses first. Thirty two and sixty four both come up. Sixty five surprises them, and that is why it sticks.
THE QUESTION THE HOUR IS NAMED AFTER
1300 picoseconds. Is that slow?
Sit with it. There is genuinely no answer yet, and it is worth noticing exactly what is missing.
A duration on its own is neither fast nor slow. It only becomes one when you put it next to how long you were willing to wait.
Let the silence run. Do not rescue them. The missing thing is the clock, and they should feel the gap first.
pick a machine and read off the answer
One clock cycle is the entire budget. The adder has to finish inside it.
clock
Same 1300 ps every time. Only the budget moves. Two per cent and three hundred ninety per cent are the same circuit.
you can do this division yourselves
So stop asking if it fits. Ask what clock it exactly fits.
Make them compute one over 1300 ps before revealing. This number should be theirs, not yours.
Below that line there is nothing to fix. Above it, nothing to tune.
remember
At 16 MHz the adder uses two per cent of the cycle. Making it faster would buy you nothing you could spend.
At 3 GHz it needs almost four cycles. No amount of careful layout closes a gap that size.
The circuit is identical on both sides of 769 MHz. Only the question changed.
This is the shape of most engineering answers: not good or bad, but a threshold with different worlds either side.
THE PART THAT ACTUALLY HURTS
Addition is underneath almost everything, and a chip has one clock.
remember
Every array index, every loop counter, every comparison, every instruction fetch goes through an adder.
The clock is one number for the whole chip, so the deepest path anywhere sets the speed of everything.
This is not a slow adder. It is a 0.77 GHz ceiling on the entire processor, however good the rest of it is.
Highest point of the hour. Stop here, let it sit, then take the break or change gear deliberately.
press randomise a few times
First way out: the carry hardly ever travels the whole width.
Randomise ten times. The journey is short nearly every time and somebody will start to hope. Let them.
thirty two bit additions, random inputs · press run and let it gather
Ninety five in every hundred would already be finished.
what the pile says
The carry travels about three columns on average, not thirty two.
Almost every addition is done long before the worst case would be.
Let the hope build for a full minute here. The next slide is much better if they have committed to it.
It does not matter what usually happens. The clock is set by what can happen.
the principle, and you will meet it all course
The circuit has no way to announce that it finished early. The clock ticks at a fixed rate whatever the inputs were.
So you pay the worst case on every single cycle, including the ninety five that were done in a third of the time.
And the worst input is not exotic. It is a counter rolling over, which every loop in every program does.
Name the principle out loud: you pay worst case, always. It returns for caches, pipelines and memory.
hands up before the next slide: will this work?
Second way out: flatten the chain into a tree, the way you did in Class 18.
it worked before
That hour ended with two circuits of identical gate count. The chain took seven delays and the tree took three, and the tree was free.
The ripple adder is that same chain, with two gates per link and thirty two links instead of seven. So flatten it.
Take the vote. Most will say yes. Being wrong here is what makes the next slide land.
the difference between the two problems, drawn
Class 18 had eight separate facts. This has one fact, thirty two times over.
remember
On the left every input exists at the same instant, so any two may be combined first and the tree costs nothing.
On the right carry five does not exist until carries one to four have happened. There is no pair you are allowed to start with.
The chain is not in the wiring. It is in the definition of a carry.
Stop on that last sentence. Do not soften it and do not hint at a way out. Next session needs this wall intact.
thirty seconds, on your own
Same method, different adder. What clock can a sixteen bit ripple hold?
Count depth, multiply by twenty, divide into one. If they can do it here they own the method, not the story.
Three down, five to go.
what you are carrying into next session
A way to judge any circuit: count the depth, multiply by the gate delay, compare against the clock you want.
An adder that is genuinely right below 770 MHz and genuinely hopeless above it.
Two ways out, both closed, and a wall: the chain lives in the definition of a carry.
The measuring method is the export from this hour. It gets used on every circuit for the rest of the course.
Would you ship it?
In a microcontroller, yes, and it would be the right call. Fewest gates and the simplest wiring of any adder, using two per cent of the cycle. In a desktop, no, and no amount of care rescues it. Same circuit, both answers.
Next session: you want the fast clock anyway. So go after the thing that is actually in the way, which is what a carry means.
Stop here. Send off: bring one idea for how you could know the carry into column four without first working out columns one, two and three. An idea, not an answer.